XT1000 Series Chipsets


Brief Description

Xingtera XT1200 G.hn chipsetThe XT1000 series chipsets are Xingtera’s G.hn based, high performance, carrier grade chipset product line. They are home network controllers based on the Xingtera patent-pending XT-DSPTM and XT-HardcoreMACTM architecture. Fully compliant to the ITU-T G.hn standard, XT1000 series chipsets support all three media: coax, power line, and phone line. Also, they incorporate the possibility to bond two Phoneline channels when those are available to be used.The XT1000 series chipsets support ITU-T compliant 25MH, 50MHz and 100MHz bandplans. They also support 200MHz bandplan for up to 2 Gbps performance, twice the ITU-T performance goal.

Application

XT1000 series chipsets, in conjunction with their companion AFE chips, XT100 series, can be used to build various G.hn-enabled home networking products: home gateways, set-top boxes (STB), home entertainment systems, network-attached storage devices (NAS), HDTVs, home security surveillance systems, digital signage, WLAN extenders, home healthcare systems, gaming consoles, desktop PCs, etc.

Features

  • Flexible home network media: coax (RF and baseband), power line, and phone line
  • Parameterized and prioritized QoS
  • Support network topology up to 254 nodes
  • Automatic detection and time domain (TD)/ frequency (FD) adaptive configuration – Maximize the data rate for a given channel condition
  • G.hn domain master: dynamic topology detection and routing; remote management capability
  • Low power consumption with power saving modes and advanced power management

Specifications

  • G.hn home network controller with
    • 2x 3.125Gbps SerDes for the high-speed interface to XT100, AFE device for XT1200
    • 2x EMACs w/ GMII/RGMII/MII/RvMII interface
    • Dual low-power ARM CPU cores for control plane processing
    • 1×16-bit DDR II/III interface
  • Support LDPC with FEC rate of 1/2, 2/3, 5/6, 16/18, and 20/21 and Low Complicity Profile (LCP)
  • Traffic classification: L2-4 header classification and flow-based analysis in HW
  • Segmentation and Reassembly (SAR) and switch HW to reach optimal MAC/DLL performance
  • 128-bit AES-CCM security with pair-wise keying and PAK support
  • 1K-entry, 4-way associative MAC table supporting unicast and multicast addresses
  • 4K–entry single tag/ double tag VLAN support
  • IGMP v2/v3 and MLD v1/v2 support
  • AV traffic with guaranteed BW & latency, time stamping & synchronization
  • Optional DDR2/DDR3 interface for packet buffering and CPU instruction & data storage
  • Low-power CMOS w/ 1.2V core & 2.5/3.3V I/O; Full commercial temperature range (0-70C)
  • QFN package w/ exposed thermal pad; Pb & Halogen free and ROHS compliant

Firmware

  • Embedded real time operating system
  • API for application customization
  • Embedded TCP/IP stack and HTTP/Telnet server for remote management
  • Easy-to-use GUI interface for configuration, monitoring, and diagnostics